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Silicon Labs /EFR32MG24A010F1024IM40 /DPLL0_S /STATUS

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Interpret as STATUS

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https://regviz.com/r/Silicon Labs/EFR32MG24A010F1536GM40/DPLL0_NS/STATUS#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RDY)RDY 0 (ENS)ENS 0 (UNLOCKED)LOCK

LOCK=UNLOCKED

Description

No Description

Fields

RDY

Ready Status
ENS

Enable Status
LOCK

Lock Status

0 (UNLOCKED): DPLL is unlocked

1 (LOCKED): DPLL is locked

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data